Keynote Speech:
Title: Risks of LSIs and What Can We Do about Them
Abstract
Powerful LSIs are indispensable for modern innovations from artificial intelligence to autonomous driving. However, LSIs, though seemingly formidable, are actually faced with 5 severe risks, namely defect escape, soft errors, aging, malicious attacking, and counterfeiting. Failing to properly address these risks will result in catastrophic consequences for not only the semiconductor industry but also mission-critical systems controlled by LSIs. This talk will highlight these risks and describe major approaches to mitigating them.
Prof. Xiaoqing Wen
He received the B.E. degree from Tsinghua University, China, in 1986, the M.E. degree from Hiroshima University, Japan, in 1990, and the Ph.D. degree from Osaka University, Japan, in 1993. He was an Assistant Professor at Akita University, Japan, from1993 to 1997, and a Visiting Researcher at the University of Wisconsin-Madison, USA, from Oct. 1995 to Mar. 1996. He joined SynTest Technologies Inc., USA, in 1998, and served as its Vice President and Chief Technology Officer until 2003. He joined Kyushu Institute of Technology, Japan, in 2003, where he is currently a Professor with the Department of Computer Science and Networks. He is a Co-Founder and Co-Chair of Technical Activity Committee on Power-Aware Testing under Test Technology Technical Council (TTTC) of IEEE Computer Society. He is serving as Associate Editors for IEEE Transactions on Very Large Scale Integration Systems (TVLSI) and Journal of Electronic Testing: Theory and Applications (JETTA). He co-authored and co-edited the latest VLSI test textbook and the first comprehansive book on power-aware VLSI testing. His research interests include design, test, and diagnosis of LSI circuits. He has published more than 310 papers and holds 43 U.S. patents & 14 Japan patents. He received the 2008 Society Best Paper Award from IEICE-ISS. He is a Fellow of IEEE.
